NoCArc 2024

https://www.nocarc.org/

17th International Workshop on Network on Chip ArchitecturesNovember 3rd  2024 – Texas, USA

To be held in conjunction with the57th Annual IEEE/ACM International Symposium on Microarchitecture®

Call for Papers:

Network-on-Chips (NoCs) play a crucial role in determining the overall performance, energy usage, and reliability of many-core processing architectures. NoCs are part of an increasingly large number of products that we use every day – demonstrating that the NoC paradigm is practical, scalable, and can be adapted to support multiple computational paradigms, ranging from multiprocessing and reconfigurable computing to the emerging areas of AI and neuromorphic computing. The goal of the NoCArc Workshop is to provide a forum for researchers and practitioners to present and discuss innovative ideas and solutions related to the design, implementation, testing and application of NoCs and NoC based many-core architectures. Topics of specific interest for the workshop include, but are not limited to:

• Machine Learning (ML) and NoC-based systems:
  • ML for modeling and predictionML based algorithms, optimization, and design methodologiesNovel interconnections for domain specific ML architecturesMemory access for the NoC-based ML systems
• NoC Architecture and Implementation:
  • Topologies, routing, and flow controlManaging QoSReliability and security issuesDesign methodologies and tools
• NoC Analysis, Optimization, and Verification:
  • Power, energy, and thermal issuesBenchmarking and experience with NoC-based systemsModeling, simulation, and synthesisDebug, test and verification of NoCs and NoC-based systems
• NoC Applications Mapping of applications onto NoCs Real and industrial NoC case studies:
  • NoCs for FPGAs, structured ASICs, CMPs and MPSoCsNoC designs for heterogeneous systems
• NoC at System-level NoC support for designing and accessing memory subsystems:
  • OS support for NoCsExisting and novel programming models including shared memory, message passing, etcLarge-scale systems (datacenters and supercomputers) with NoC-based systems as building blocks
• NoC at System-level NoC for quantum architectures:
  • Wireless, Optical, and RFNoCs for 3D and 2.5D packages including Network-in-Package (NiP)Approximate computing for NoCs and NoC-based systemsChip-to-Chip Interconnects

Besides regular papers, papers describing “work in progress” or incomplete but sound new innovative ideas related to the workshop theme are also encouraged.

General Chair:

•  Abhijit Das, Universitat Politécnica de Catalunya, Spain
• Md Farhadur Reza, Eastern Illinois University, USA

Program Co-Chairs:

• José L. Abellán, University of Murcia, Spain
• Alireza Monemi, Barcelona Supercomputing Center, Spain

Publicity Chairs:

• José Cano, University of Glasgow, UK
• Dipika Deb, Intel Corporation, India

Steering Committee: 

• Maurizio Palesi, University of Catania, Italy,
• Masoud Daneshtalab, Mälardalen University, Sweden,
• Xiaohang Wang, Guangzhou Institute of Advanced Technology, China,
• Davide Patti, University of Catania, Italy,
• Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden
• Kun-Chih (Jimmy) Chen, National Sun Yat-sen University, Taiwan
• Sergi Abadal, Universitat Politècnica de Catalunya, Spain
• Amlan Ganguly, Rochester Institute of Technology, NY, USA
• Salvatore Monteleone, Niccolò Cusano University, Italy

Important Dates:

• Abstract submission deadline:  July 22, 2024
• Full paper submission deadline:  July 29, 2024
• Author notification:  August 19, 2024
• Camera-ready version due:  August 26, 2024

NoCArc Workshop will be held on November 3, 2024 in conjunction with the 57th IEEE/ACM International Symposium on Microarchitecture® (MICRO-57)