High-Speed 4.68Gb/s Polar Decoder with Bit-Split Registers Using Belief Propagation

EasyChair Preprint 14874

Abstract

Polar decoders play a crucial role in modern high-speed communication systems, particularly in the context of 5G and other next-generation wireless networks. This article presents a novel approach for designing a high-speed polar decoder capable of achieving a data throughput of 4.68 Gb/s. The proposed architecture leverages belief propagation (BP) as a decoding algorithm and introduces an optimized bit-splitting register file to enhance processing speed and efficiency. The key benefits of this architecture include reduced latency, increased parallelism, and power efficiency, making it ideal for applications requiring rapid data decoding. The article also delves into the challenges encountered in balancing speed, power consumption, and scalability. The proposed polar decoder’s performance is compared to conventional decoding methods, showing significant improvements in speed and efficiency. Finally, future directions for further optimization are discussed, highlighting the potential for even greater data rates in future communication systems.

Keyphrases: 5G communication, Polar decoder, Register File, belief propagation, bit-splitting, data throughput, error-correcting codes, high-speed decoding, low latency decoding, power efficiency

@booklet{EasyChair:14874,
  author    = {Alakitan Samad},
  title     = {High-Speed 4.68Gb/s Polar Decoder with Bit-Split Registers Using Belief Propagation},
  howpublished = {EasyChair Preprint 14874},
  year      = {EasyChair, 2024}}